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mfang2.0
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Opened by mengxiangchen@mengxiangchen
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[Bug] LE0时钟树 ADC外设关联

  1. 时钟树中配置主时钟64M
  2. ADC外设时钟源设为PLL，分频/8
  3. 使能ADC
  4. 时钟分频显示为/16